The principal process of semiconductor production is photolithography, which includes three main serial steps or operations:                (a) coating the wafer with photoresist material (PR);        (b) exposing the PR through a mask with a predetermined pattern in order to produce a latent image of the mask on the PR; and        (c) developing the exposed PR in order to produce the image of the mask on the wafer.        
The satisfactory performance of these steps requires a number of measurement and inspection steps in order to closely monitor the process.
Generally speaking, prior to a photolithography process, the wafer is prepared for the deposition of one or more layers. After a photolithography process is completed, the uppermost layer on the wafer is etched. Then, a new layer is deposited in order to begin the aforementioned sequence once again. In this repetitive way, a multi-layer semiconductor wafer is produced.
FIG. 1 schematically illustrates a typical set-up of photocluster tools of the photolithography process in a semiconductor fabrication plant (Fab). The photocluster (or link) is composed of two main parts: the phototrack 5, and the exposure tool 8. The phototrack includes a coater track 6 having a cassette load station 6a, and a developer track 10 having a cassette unload station 10a. Alternatively, both coater and developer functions may be combined and realized in the same stations (not shown). The wafer W is placed in the cassette station 6a. From there the wafer is loaded by a robot 2 to the coater track 6 where the coating step (a) commences. After step (a), the wafer is transferred by the robot 2 to the exposure tool 8, where the exposing step (b) is executed. Here, using optical means installed inside the exposure tool, the pattern on the mask is aligned with the structure already on the wafer (registration). Then, the wafer W is exposed to electromagnetic radiation through the mask. After exposure, robot 2 transfers the wafer to the developer track 10 where the micro-dimensional relief image on the wafer is developed (step). The wafer W is then transferred by robot 2 to the cassette station 10a. Steps (a)–(c) also involve several different baking and other auxiliary steps which are not described herein.
As shown in FIG. 1, the coater track 6, the exposure tool 8, and the developer track 10, are tightly joined together in order to minimize process variability and any potential risk of contamination during photolithography, which is a super-sensitive process. Some available commercial exposure tools are series (MA-1000, 200, 5500) of Dainippon Screen MFG. Co. Ltd., Kyoto, Japan, PAS-5500 series of ASM Lithography, Tempe, Ariz., series FPA 3000 and 4000 of Canon USA Inc., USA, and Microscan of SVGL, Wilton, Conn. Some available phototracks are series 90s and 200 of SVGT, San-Jose, Calif., Polaris of FSI International, Chaska, Minn., and phototracks D-spin series (60A/80A, 60B, 200) ) of Dainippon Screen MFG. Co. Ltd., Kyoto, Japan, Falcon of Fairchild Technologies Inc., USA and of Tokyo Electric Laboratories (TEL), Japan.
It is apparent that in such a complex and delicate production process, various problems, failures or defects, may arise or develop during each step, or from the serial combination of steps. Because of the stringent quality requirements, any problem which is not discovered in time may result in the rejection of a single wafer, or of the whole lot.
A wafer cannot be taken out of the photocluster for measurement or inspecting before the process is completed and the wafer arrives at the cassette station 10b. As a result, any process control based on measuring processed wafers cannot provide ‘real time’ process malfunction detection. Therefore, there is an urgent need for an approach based on integrated monitoring, i.e., a monitoring apparatus physically installed inside or attached to the relevant production unit, dedicated to it, and using its wafer handling system. Such integrated monitoring can provide tight, fast-response and accurate monitoring of each of the steps, as well as complete and integrated process control for the overall semiconductor production process, in general, and for photolithography, in particular.
However, examination of the prior art, insofar as known to us, indicates that no such monitoring and control methods and/or systems exist. Rather, only ‘stand-alone’ monitoring systems appear to be available at the moment.
A ‘Stand-alone’ monitoring system is one which is installed outside the production line and in which the wafers are transferred from the production unit to the monitoring system using a separate handling system than that of the production process.
In general, three different monitoring and control processes are performed at the present time during semiconductor fabrication process. These are monitoring of (a) overlay misregistration, (b) inspecting and (c) critical dimension (CD) measurement. A brief description of each of these processes is given below:
(a) Overlay Registration Control
The overlay registration (hereinafter—“overlay”) is a process executed in the exposure tool 8 in which the pattern on the mask is aligned with respect to the pattern features existing already on the uppermost layer on the wafer. The shrinking dimensions of the wafer's features increases the demands on overlay accuracy.
An overlay error or misregistration (hereinafter—“overlay error”) is defined as the relative misalignment of the features produced by two different mask levels. The error is determined by a separate metrology tool from the exposure tool.
FIG. 2(a) illustrates a typical overlay error determination site on a wafer. It is composed of two groups of target lines, one on the uppermost feature layer of the wafer 11 and the second is produced on the new PR layer 16. Target lines 16 are similar but smaller than target lines 11; thus they can be placed in the center of target lines 11. Therefore, these overlay targets are called “bars in bars”. FIG. 2(b) is a top view of the same overlay error determination site. The lines of these targets, such as 11a and 16a are typically of ˜2 μm width, and 10–15 μm length, respectively.
According to a common method, the overlay error is defined as the relative displacement of the centers of target lines 11 with respect to lines 16, in both the x and y axis. For example, in FIG. 6 the displacements between lines 11a and 16a, 11b and 16b are denoted as 14a and 14b, respectively. Thus, the overlay error in the x axis is the difference between the lengths of lines 14a and 14b. 
FIG. 3 illustrates a common configuration of photocluster tools and a ‘stand-alone’ overlay metrology system composed of a measurement unit and an analysis station. It should be noted that wafers to be examined are taken out of the photolitography process-line, and handled in the measurement tool. The latter results from the facts that with the available overlay technology (i): closed loop control in ‘real time’ is not possible; (ii) not all the wafers as well as all the layers within a wafer are measured for overlay error; (iii) additional process step is needed; and (iv) a ‘stand alone’ tool is needed. It should be noted that it is a common situation in the Fab, especially in advanced production processes, that during ‘stand alone’ overlay measurement, the processing of the lot is stopped. This break may even take a few hours.
The results of the measurements are sent to the analysis station, and a feedback is returned to the stepper in the photocluster tool.
U.S. Pat. No. 5,438,413 discloses a process and a ‘stand-alone’ apparatus for measuring overlay errors using an interferometric microscope with a large numerical aperture. A series of interference images are tat different vertical planes, and artificial images thereof are processed, the brightness of which is proportional to either the complex magnitude or the phase of the mutual coherence. The differences between synthetic images relating to target attribute position are then used as a means of detecting overlay error. KLA-Tencor, Calif., the assignee of this patent, sells a ‘stand-alone’ machine under the brand name KLA-5200. In this system, the measurement and the analysis station are combined together.
U.S. Pat. No. 5,109,430 discloses another overlay metrology system. By comparing spatially filtered images of patterns taken from the wafer with stored images of the same patterns, the overlay error is determined. Schlumberger ATE, Concord, Mass., the assignee of this patent, supplies a ‘stand-alone’ machine for submicron overlay under the brand name IVS-120.
Other ‘stand-alone’ overlay metrology systems are manufactured by BIO-RAD micromeasurements, York, Great Britain, under the brand name Questar Q7, as well as by Nanometrics, Sunnyvale, Calif. (Metra series).
All the aforementioned methods and metrology systems for determining overlay error suffer from several drawbacks including the following:                1) They are all ‘stand-alone’ systems, i.e., operating off-line the photolithography process. Thus, they provide post-process indication of overlay errors, not during the production process itself, or before a batch of wafer production is completed. In some cases this may take hours, or more.        2) They result in a waste of wafers, and/or lots of wafers because of this post-process response. This results from the continuous operation of the photolithographic process on the one hand, and the time-delay from the time a wafer is sent offline to overlay measurements until a response about an error is obtained, on the other hand.        3) Usually, one of the main overlay error sources is the first mask alignment for a wafer to come on a lot. Such an error source cannot be corrected later since the error varies for each lot. For this reason it is important to have the feedback within the time frame of the first wafer which cannot be obtained using a ‘stand-alone’ tool.        4) The overlay sampling frequency is limited due to contamination restrictions and additional expensive time needed for extra handling and measurements.        5) Throughput of the photolithography process is reduced as a result of the post-process overlay detection and the long response-time, as well as of the reduced sampling frequency mentioned in (3).        6) These stand-alone systems require additional expensive foot-print and labor in the Fab.        7) The microlithography tools are the “bottle neck” in the semiconductors production process and they are the most expensive tools in the FAB. Their partial utilization due to late off-line measurements reduces drastically overall equipment efficiency in the Fab.        
(b) Inspecting
Inspecting during the production of semiconductors wafers can be defined as a search for defects caused by:                (a) contamination (dirt, particles, chemicals, residues, etc.), and/or        (b) process induced failures related to PR, coating, baking, development, handling, etc.        
In order to detect defects originating only from the lithography process, a specific inspecting step is conducted after the development step as illustrated in FIG. 4. It is usually called “after development inspecting” (ADI), or “post-development check” (PDCK). The present invention is mainly relevant for ADI.
In general, data obtained during the inspecting is analyzed, and in case an increased defects level is detected, an alarm is sent to the engineering level or to the production line. Once again it should be noted that, as in the case of overlay metrology, with the current technology, the ADI is located out of the production line; i.e., wafers to be inspected are taken out of the production process and handled in a separate inspecting station. It should also be noted that it is a common situation in the Fab, especially in advanced production processes, that during ‘stand alone’ inspecting, the processing of the lot is stopped. This break may take even few hours.
Today, the majority of ADI activities are non-automatic visual inspecting conducted by humans. In particular, no integrated automatic ADI system is commercially available at the moment.
ADI is aimed at:                (i) Coarse inspecting—A wafer is handled by hands and is visually inspected by eye-sight for large defects. These defects can be, for example, poor spinning during coating, poor development, scum, non-attached PR (‘lifting’), and/or edge beads. This method can usually only detect defects bigger than tens of microns.        (ii) Fine inspecting—predetermined sites or targets on a wafer are visually inspected with the aid of a microscope (20–50× magnification).        
These defects can be, e.g., shorts between conducting lines, and focus failures of the stepper.
ADI conducted by humans has several disadvantages:                (a) It is tedious and requires great concentration to locate pattern discrepancies in repetitive and complex circuits.        (b) The results are not uniform with respect to each inspector as well as between different inspectors. This point becomes crucial when considering the increased importance of inspecting at times when the wafer features become more and more delicate due to the continuous shrinking of the wafer's features.        (c) It is not a consistent means for statistical analysis and for measuring process quality due to non-repetitive results.        (d) Additional costs due to the labor.        (e) Non objective inspecting, neither in defects identification nor in the specific action which should take place once a specific defect is identified.        (f) Fluctuating throughput results, among other things, in difficulties to determine sampling frequency.        (g) Manual inspecting is also done off-line and therefore suffers from all the same aforementioned disadvantages of ‘stand-alone’ systems.        
To complete the picture, it should be noted that two automatic optical inspection (AOI) methods for defect detection are known, but their high cost and low throughput limit their use in actual production.                (i) Absolute methods—illuminating a wafer at a predetermined angle (“grazing”) and collecting the reflected signal from the wafer's plane. Any signal above a threshold (absolute) value is determined as a defect. According to this method, particles bigger than 0.1 μm can be detected.        (ii) Comparative methods—these are divided into ‘die to die’and ‘die to database’. A wafer is photographed and then an automatic comparison of pixels in one die is made with respect to the correlative pixels in a neighbor die, or to a database. Usually, the result of the comparison should fit a set threshold, unless there is a defect. The threshold may be a function of the gray level and/or the specific location of the dye in the wafer.        
Method (ii) overcomes the shortcomings of method (i), and usually detects defects such as dirt particles (>0.1 μm), bridging of conducting lines, missing features, residues of chemicals and PR, etc. The defect level these methods can detect is determined according to the design rule of the industry (e.g., 0.1 μm).
None of the available inspecting tools samples each wafer, but only several wafer in a lot. Moreover, the lack of such inspecting systems prevents any option for automatic and tight feedback or closed loop control over the lithography process. Thus, any serious attempt for establishing or even improving the process control around the photolithography process is prevented, or at least is met with crucial obstacles due to the lack of such method(s) and systems.
Critical Dimension (CD) Control
A third monitoring and control process is the Critical Dimension CD control which includes measurements of characteristic dimensions in critical locations on a wafer, e.g., widths of representative lines, spaces, and line/space pairs on the wafer. CD metrology tools are based on two main technologies: the CD scanning electron microscope (CD SEM), and the atomic forced microscope (CDAFM). Commercial tools based on CD SEM are series 7830XX of Applied Materials, Santa Clara, Calif., and DEKTAK SXM-320 of VEECO, USA is based on AFM.
FIG. 5 illustrates common configurations of ‘stand-alone’ CD tools with the production process. Typically, CD measurements take place after the developing step and/or after etching. The CD tool is located out of the production line, i.e., wafers to be measured are taken out of the production process and handled to a separate CD station. It should be noted that it is a common situation in the Fab, especially in advanced production processes, that during ‘stand alone’ CD measurement, the processing of the lot is stopped. This break may take even few hours.
In general, data obtained during the CD measurement is analyzed, and then a kind of feedback (or alarm in a case of a width out of the permitted range) is sent to the relevant unit in the production line.
CDSEM and CDAFM allow CD measurement for line/space width below the resolution limit of optical microscope. However, when possible, optical CD (OCD) measurement may be very useful because they can be combined with optical overlay measurement systems. Recently, (C.P. Ausschnitt, M.E., Lagus (1998) Seeing the Forest for the Trees: a New Approach for CD Control”, SPIE, vol. 3332, 212–220), it was proposed to use OCD even for sub-micron design rules that is behind the optical resolution. The idea is that optical systems allow fast measurement of many lines simultaneously. Statistical treatment of multiple measurements with low accuracy, allows to extract such important manufacturing data as repeatability or deviation trends.
It is clear, as was noted before with respect to overlay metrology and inspecting tools, that since all CD metrology systems are ‘stand-alone’ tools, they suffer from the same drawbacks as discussed before. Moreover, especially in the case of CD measurement, the results, e.g., line width, give a limited ability to correlate the measurement to any specific cause.